It is usual in instrument landing systems to transmit a ground signal to a landing aircraft in which successive pulses contain angle and other information. It is also usual to transmit a second pulse for each successive pulse in the signal so as to create a subcession of pulse pairs which are position modulated by an incremental signal to identify the information in the main signal as azimuth, elevation, and the like. A pulse position demodulator circuit is provided in each of the landing aircraft for detecting the time spacing between the pulses of the received pulse pairs, so as to provide a demodulated signal which indicates to the system whether the received angle information is azimuth, elevation, or the like.
As mentioned above, the pulse position demodulator circuit of the present invention has particular utility in such instrument landing systems. However, it will become apparent as the description proceeds that the pulse demodulator circuit of the invention has general utility as a pulse position demodulator capable of generating a digital output which is a function of the incremental modulation of the spacing between the pulses of a received pulse signal, where the modulation consists of fixed incremental changes in the pulse spacing.
The prior art demodulator circuits of the same general type as the demodulator of the present invention require a shift register with high resolution which is usually four times the pulse spacing increment. This means that the shift register must be relatively long and relatively high speed, so that the circuitry in the prior art demodulator circuits is relatively complex, and the power requirements are relatively high.
The pulse position demodulator circuit of the present invention, on the other hand, may be constructed to use less than half the integrated circuits of the prior art demodulators, to consume less than one-third the power, and to require a shift register of one-fourth the length of the shift register used in the prior art demodulators. The pulse position demodulator circuit of the present invention, in the embodiment to be described, utilizes digital techniques, and it employs medium scale integration (MSI) components.